CY7C1051DV33-10ZSXI, IC, SRAM, 8 Mbit, 512K x 16bit, 10 ns Access Time, 3 V to 3.6 V supply, TSOP-II-44
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The CY7C1051DV33-10ZSXI is a 8Mb high performance CMOS Static RAM organized as 512K words by 16-bits. To write to the device, take chip enable and write enable inputs LOW. If byte LOW enable is LOW, then data from I/O pins, is written into the location specified on the address pins. If byte HIGH enable is LOW, then data from I/O pins is written into the location specified on the address pins. To read from the device, take chip enable and output enable LOW while forcing the write enable HIGH. If byte LOW enable is LOW, then data from the memory location specified by the address pins appears on I/O0-I/O7. If byte HIGH enable is LOW, then data from memory appears on I/O8 to I/O15. The input/output pins are placed in a high-impedance state when the device is deselected, the outputs are disabled, the BHE and BLE are disabled or a write operation is in progress.
• Low CMOS standby power
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE
Полупроводники - Микросхемы\Память\SRAM