A3P125-VQ100I, FPGA - Field Programmable Gate Array ProASIC3 FPGA, 1.5KLEs
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Описание
FPGA ProASIC®3 Family 125K Gates 231MHz 130nm Technology 1.5V 100-Pin VQFP Tray
Технические параметры
| Automotive | No |
| Copy Protection | No |
| Device Logic Gates | 125000 |
| Device Number of DLLs/PLLs | 1 |
| Device System Gates | 125000 |
| ECCN (US) | EAR99 |
| Embedded Memory (Kbit) | 36 |
| EU RoHS | Not Compliant |
| Family Name | ProASIC®3 |
| I/O Voltage (V) | 1.5|1.8|2.5|3.3 |
| In-System Programmability | Yes |
| JTAG Support | Yes |
| Lead Shape | Gull-wing |
| Maximum I/O Performance | 700Mbps |
| Maximum Operating Supply Voltage (V) | 1.575 |
| Maximum Operating Temperature (°C) | 100 |
| Maximum Supply Current (mA) | 15 |
| Minimum Operating Supply Voltage (V) | 1.425 |
| Minimum Operating Temperature (°C) | -40 |
| Mounting | Surface Mount |
| Number of Global Clocks | 18 |
| Number of I/O Banks | 2 |
| Number of Inter Dielectric Layers | 7 |
| Number of Registers | 3072 |
| Operating Supply Voltage (V) | 1.5 |
| Opr. Frequency (MHz) | 231 |
| Packaging | Tray |
| Part Status | Active |
| PCB changed | 100 |
| Pin Count | 100 |
| PPAP | No |
| Process Technology | 130nm |
| Program Memory Type | Flash |
| Programmability | Yes |
| Reprogrammability Support | Yes |
| Single-Ended I/O Standards | LVTTL|LVCMOS |
| Speed Grade | STD |
| Standard Package Name | QFP |
| Supplier Package | VQFP |
| Supplier Temperature Grade | Industrial |
| Total Number of Block RAM | 8 |
| Tradename | ProASIC |
| User I/Os | 71 |
| Вес, г | 0.505 |
Техническая документация
Datasheet
pdf, 5189 КБ
Дополнительная информация
Калькуляторы группы «Микросхемы программируемой логики»
Типы корпусов импортных микросхем
