A3P1000-1FGG484I, FPGA ProASIC®3 Family 1M Gates 272MHz 130nm Technology 1.5V 484-Pin FBGA Tray
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Описание
Programmable Devices\Programmable Logic Devices\Field Programmable Gate Arrays - FPGAs
FPGA ProASIC®3 Family 1M Gates 272MHz 130nm Technology 1.5V 484-Pin FBGA Tray
Технические параметры
| Automotive | No |
| Copy Protection | No |
| Device Logic Gates | 1000000 |
| Device Number of DLLs/PLLs | 1 |
| Device System Gates | 1000000 |
| Differential I/O Standards | LVDS|LVPECL|B-LVDS|M-LVDS |
| ECCN (US) | 3A991.d. |
| Embedded Memory (Kbit) | 144 |
| Family Name | ProASIC®3 |
| I/O Voltage (V) | 1.5|1.8|2.5|3.3 |
| In-System Programmability | Yes |
| JTAG Support | Yes |
| Lead Shape | Ball |
| Maximum Differential I/O Pairs | 74 |
| Maximum I/O Performance | 700Mbps |
| Maximum Operating Supply Voltage (V) | 1.575 |
| Maximum Operating Temperature (°C) | 100 |
| Maximum Supply Current (mA) | 75 |
| Minimum Operating Supply Voltage (V) | 1.425 |
| Minimum Operating Temperature (°C) | -40 |
| Mounting | Surface Mount |
| Number of Global Clocks | 18 |
| Number of I/O Banks | 4 |
| Number of Inter Dielectric Layers | 7 |
| Number of Registers | 24576 |
| Operating Supply Voltage (V) | 1.5 |
| Opr. Frequency (MHz) | 272 |
| Packaging | Tray |
| Part Status | Active |
| PCB changed | 484 |
| Pin Count | 484 |
| PPAP | No |
| Process Technology | 130nm |
| Program Memory Type | Flash |
| Programmability | Yes |
| Reprogrammability Support | Yes |
| Single-Ended I/O Standards | LVTTL|LVCMOS |
| Speed Grade | 1 |
| Standard Package Name | BGA |
| Supplier Package | FBGA |
| Supplier Temperature Grade | Industrial |
| Total Number of Block RAM | 32 |
| Tradename | ProASIC |
| User I/Os | 300 |
Техническая документация
Datasheet
pdf, 5421 КБ
