AM26LS32ACN, Счетверенный дифференциальный линейный приемник [DIP-16]
The AM26LS32ACN is a quadruple differential Line Receiver for balanced or unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design specifies that if the inputs are open, the outputs always are high. The AM26LS32 is incorporates an additional stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional stage has increased propagation delay, however, this does not affect interchangeability in most applications.
• Meets/exceeds requirements of ANSI TIA/EIA-422-B, TIA/EIA-423-B & ITU recommendation V.10/V.11
• 50mV Typical input hysteresis
• Low-power Schottky circuitry
• 3 State outputs
• Complementary output-enable inputs
• 12kR Minimum input impedance