SN74LS164N, 8-битный последовательный сдвиговый регистр с параллельным выходом, [DIP-14]
The SN74LS164N is a serial-in Shift Register features gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup-time requirements will be entered. Clocking occurs on the low-to-high-level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.
• Gated serial inputs
• Fully buffered clock and serial inputs
• Asynchronous clear