SN74LS393D, Decade / Binary Counter, LS Family, 35 MHz, 4.75 V to 5.25 V, SOIC-14
|120 руб.||×||=||120 руб.|
The SN74LS393D is a 4-bit dual Binary Counter contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters. It incorporates dual divide-by-two and divide-by-five counter, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. It comprises two independent four-bit binary counters each having a clear and a clock input. It has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals.
• Direct clear for each 4-bit counter
• Buffered outputs reduce possibility of collector commutation
• Green product and no Sb/Br
Полупроводники - Микросхемы\Логические\Счетчики