CY37512P208-83NXC, CPLD Ultra37000 Family 15K Gates 512 Macro Cells 83MHz 5V 208-Pin PQFP
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Описание
Programmable Devices\Programmable Logic Devices\Complex Programmable Logic Devices - CPLDs
CPLD Ultra37000 Family 15K Gates 512 Macro Cells 83MHz 5V 208-Pin PQFP
Технические параметры
| Automotive | No |
| Data Gate | No |
| Device System Gates | 15000 |
| EU RoHS | Compliant |
| Family Name | Ultra37000 |
| I/O Voltage (V) | 3.3|5 |
| Individual Output Enable Control | No |
| In-System Programmability | Yes |
| Lead Shape | Gull-wing |
| Maximum Clock to Output Delay (ns) | 8 |
| Maximum Internal Frequency (MHz) | 83 |
| Maximum Number of User I/Os | 165 |
| Maximum Operating Supply Voltage (V) | 5.25 |
| Maximum Operating Temperature (°C) | 70 |
| Maximum Propagation Delay Time (ns) | 15 |
| Minimum Operating Supply Voltage (V) | 4.75 |
| Minimum Operating Temperature (°C) | 0 |
| Mounting | Surface Mount |
| Number of Global Clocks | 4 |
| Number of Logic Blocks/Elements | 32 |
| Number of Macro Cells | 512 |
| Part Status | Obsolete |
| PCB changed | 208 |
| Pin Count | 208 |
| PPAP | No |
| Product Terms | 16 |
| Program Memory Type | EEPROM |
| Programmability | Yes |
| Reprogrammability Support | Yes |
| Speed Grade | 83 |
| Standard Package Name | QFP |
| Supplier Package | PQFP |
| Supplier Temperature Grade | Commercial |
| Tolerant Configuration Interface Voltage (V) | 5 |
| Tradename | Ultra37000 |
| Typical Operating Supply Voltage (V) | 5 |
Техническая документация
Datasheet
pdf, 726 КБ
