SI5317-EVB, Clock & Timer Development Tools Si5317 Evaluation Board

Si5317 Jitter Cleaning Clock
The Silicon Labs Si5317 Jitter Cleaning Clock is the industry's most frequency flexible solution for applications that require jitter attenuation without clock multiplication. The Silicon Labs Si5317 Jitter Cleaning Clock leverages patented DSPLL® technology with industry-best tunability to remove noise on any clock signal ranging from 1 MHz to 710 MHz and produce two ultra-low jitter output clocks at the same frequency. All PLL circuitry is integrated on-chip and all device configuration is made via pin settings minimizing design time and layout complexity while eliminating the need for firmware and serial programming. The Si5317 Jitter Cleaning Clock provides a simple, convenient, cost-effective jitter filtering solution for performance-sensitive applications.