10M02SCE144C8G, FPGA - Field Programmable Gate Array non-volatile FPGA, 101 I/O, 144EQFP
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Описание
FPGA MAX 10 Family 2000 Cells 55nm Technology 1.2V 144-Pin EQFP EP Tray
Технические параметры
| Automotive | No |
| Copy Protection | No |
| Dedicated DSP | 16 |
| Device Logic Units | 2000 |
| Device Number of DLLs/PLLs | 2 |
| Differential I/O Standards | LVDS|SSTL|HSUL |
| ECCN (US) | EAR99 |
| Embedded Memory (Kbit) | 108 |
| EU RoHS | Compliant |
| External Memory Interface | DDR2 SDRAM|LPDDR2 SDRAM|DDR3 SDRAM|DDR3L SDRAM |
| Family Name | MAX 10 |
| I/O Voltage (V) | 1.2|1.35|1.5|1.8|2.5|3|3.3 |
| In-System Programmability | Yes |
| JTAG Support | Yes |
| Lead Shape | Gull-wing |
| Logic Elements | 2000 |
| Maximum Operating Supply Voltage (V) | 1.25 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Supply Voltage (V) | 1.15 |
| Minimum Operating Temperature (°C) | 0 |
| Mounting | Surface Mount |
| Number of Global Clocks | 20 |
| Number of Look-up Table Input | 4 |
| Number of Multipliers | 16(18x18) |
| Operating Supply Voltage (V) | 1.2 |
| Packaging | Tray |
| Part Status | Active |
| PCB changed | 144 |
| Pin Count | 144 |
| PPAP | No |
| Process Technology | 55nm |
| Program Memory Type | SRAM |
| Programmability | Yes |
| Reprogrammability Support | Yes |
| Shift Registers | Utilize Memory |
| Speed Grade | 8 |
| Standard Package Name | QFP |
| Supplier Package | EQFP EP |
| Supplier Temperature Grade | Commercial |
| Tradename | MAX® 10 |
| User I/Os | 101 |
Техническая документация
Datasheet
pdf, 251 КБ
